ASML, TSMC partner for 12-inch photomasks to boost chip production

Published : Sep 08, 2026, 06:30 PM IST
ASML, TSMC join hands for 12-inch photomasks (Photo-TSMC)

Synopsis

ASML and TSMC have partnered to lead an industry shift to 12-inch photomasks. They aim to build a pilot line by 2031 to support next-gen advanced chip manufacturing using High NA EUV lithography, improving productivity and cutting costs.

Semiconductor equipment major ASML and Taiwan Semiconductor Manufacturing Company (TSMC) have joined hands on an industry-wide initiative to drive the transition to 12-inch photomasks, with the companies targeting a pilot line by 2031 to support the next generation of advanced chip manufacturing.

Maximising Benefits with 12-inch Masks

The companies in an official statement, highlighted that the initiative is aimed at maximising the benefits of High Numerical Aperture (High NA) Extreme Ultraviolet (EUV) lithography, a technology used to print increasingly small and complex features on semiconductor chips.

ASML and TSMC said the industry will initially continue using the current 6-inch masks for High NA EUV production. However, shifting to larger 12-inch masks is expected to further improve semiconductor manufacturing productivity, reduce chipmaking costs and remove stitching constraints. The companies said this transition would allow advanced chip manufacturers to make fuller use of High NA EUV technology and make future generations of leading-edge chips more cost-effective.

Timeline and AI-Driven Demand

Under the initiative, ASML and TSMC aim to establish a 12-inch mask pilot line by 2031. This is expected to pave the way for 12-inch High NA lithography systems to enter advanced-node production by 2033. The move comes as semiconductor manufacturers prepare for increasingly complex chip designs, particularly those driven by the growing requirements of artificial intelligence (AI) applications.

TSMC intends to use ASML’s High NA technology for high-volume manufacturing of advanced nodes starting in 2030. As chip technology advances, TSMC expects the number of layers requiring High NA EUV to increase, primarily because of the more complex transistor architectures needed for AI applications.

Leaders on Industry-Wide Collaboration

“We expect the adoption of High NA EUV to increase progressively along the device scaling roadmap, first using current 6-inch masks and then further supported by 12-inch masks, which enable greater scanner productivity and allow the industry to meet the demand for smaller, faster and more energy-efficient chips,” said Christophe Fouquet, President and CEO, ASML. He added that the companies were encouraged by the initial support from semiconductor manufacturers, mask suppliers and other partners for the initiative.

TSMC Chairman and CEO C.C. Wei said collaboration across the semiconductor value chain would be important to address complex technology challenges. “We have always believed that when the industry works together to solve complex problems, we unlock possibilities that no single company could achieve alone,” Wei said. He said bringing together expertise from across the industry’s value chain could help support continuous innovation, lower barriers and make advanced solutions accessible at scale.

Ecosystem Support and Future Impact

The initiative was established on September 7, ahead of the annual SPIE BACUS Conference in Monterey, California. ASML and TSMC said major ecosystem partners and suppliers attended the event and expressed interest in supporting the transition to the larger photomask format.

The companies expect the shift to 12-inch photomasks to benefit the broader semiconductor industry by improving productivity and reducing costs as High NA EUV adoption expands. (ANI)

(Except for the headline, this story has not been edited by Asianetnews Editorial staff and is published from a syndicated feed.)

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